PiTrex: Raster Problem

Excert of an eMail of mine 17th July 2019

I'll try things out - but my feeling is, that we the have a "second" problem, 
when doing raster in direct emulation. (after I fix tailgunner, I'll go back 
to vecx and try a "non direct" version - that might work better with raster)

1) to output one letter of "raster" text following code is used (6809 asm):
LF4C7:          LDA     A,X             ;Get bitmap from chargen table
                STA     <VIA_shift_reg  ;Save in shift register
LF4CB:          LDA     ,U+             ;Get next character
                BPL     LF4C7           ;Go back if not terminator

== 18 cycles per loop, exactly one shift cycle, the beam goes from left to 
right for one word/sentence

-----------------------> (beam) time needed: letters * 18 cycles

to print the next line, the beam has to go back to the leftthis is done with 
following code:

                LDA     #$01
                STA     <VIA_port_b     ;Enable RAMP, disable mux
                CMPX    #Char_Table_End-$20;     Check for last row
                BEQ     LF50A           ;Branch if last row
                LEAX    $50,X           ;Point to next chargen row
                TFR     U,D             ;Get string length
                SUBD    Vec_Str_Ptr
                SUBB    #$02            ; -  2
                ASLB                    ; *  2
                BRN     LF4EB           ;Delay a moment
LF4EB:          LDA     #$81
                BNE     LF4EB           ;Delay some more in a loop
                STA     <VIA_port_b     ;disable RAMP, disable mux

The string length is calculated and a "busy" wait loop is executed.
The cycles are exactly the same. The loop calculation takes 18 cycles
and each loop takes 9 cycles.
So at the end the same amount of cycles is executed while "ramp" is active
<---------------------- (beam goes back)
 Then the next row of raster data is output.
(See also: http://vectrex.malban.de/preliminary/a1c5ac89.html)

The  thing is, to insure correct raster draw, we not only have to do a  
correct supply to the shift register (which we can probably do with what  
you explained).
We also must ensure, that the "busy" wait loop, of the emulated vectrex 
takes EXACTLY the same time!
If  we do that "generally" we must assure each assembler instruction  
emulated takes exactly as long as the 1.5Mhz instructions of the 6809,  
which "most of the time" is probably nonsense.
We can fix the "BIOS"  probably by checking the PC address and do a 
forced wait. But that would  only fix the BIOS printing routines, it 
would not be a general raster  fix.

As of now, I have no "clean" solution.
(PS. even the  vectrex 6809 can not assure a 100% correct timing (analog
hardware),  this can be seen by all kinds of itallic/slanted texts)


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